#!perl -w
# ==============================================================================
# Package Name: IPat_GenBsrMod.pm
# Revision: 20220504a
# Author: Altmo toolbox
# Description: Write Module has BSR chain and JTAG controller.
#   Errata : (1)does not support vector port.
#            (2)supports only inout, input, output2 or output3.
# ==============================================================================
package IPat_GenBsrMod;
use strict;

# ==============================================================================
sub writeBsrModel {
    my @args = @_;
    
    my $obj = $args[0];
    
    my $fname = '';
    if ($#args > 0) {
        $fname = $args[1];
    } else {
        $fname = $obj->{bsdl}->{entity}.'.v';
    }
    
    my $fh;
    open($fh, "> $fname") or die "ERR: $obj->{class}: can not open $fname\n";
        print $fh @{$obj->{net}};
    close($fh);
    
    print "INF: $obj->{class}: $fname is written as BSR simulation model.\n";
}

# ==============================================================================
sub new {
    my @args = @_;

  # operator check
    my $bsdl;
    if ($#args >= 1) {
        $bsdl = $args[1]; # called by allow operator
    } else {
        $bsdl = $args[0]; # called by name space
    }
    
  # base object
    my $obj = {};
  
  # name of class(name_space)
    my $class = __PACKAGE__;
  
  # $obj belong to the class
    bless $obj, $class;
  
  # set class name
    $obj->{class} = $class;
    
  # set bsdl data to the object
    $obj->{bsdl} = $bsdl;
  
  # set common specifications
    #setJtagContSpec($obj); # JTAG controller
    #setJtagBcSpec($obj);   # Boundary Cell
    #setIoSpec($obj);       # IO module
    setSimSpec($obj);       # Some settings for simulation 
    
    makeNetlist($obj);      # Making netlist data
    
  # return object of BSR module
    return($obj);
}

# ==============================================================================
sub makeNetlist {
    my ($obj) = @_;
    
    addNetlistHeader($obj);
    print "INF: $obj->{class}: header block is generated...\n";
    addNetlistPortdef($obj);
    print "INF: $obj->{class}: port definitions are generated...\n";
    addNetlistWiredef($obj);
    print "INF: $obj->{class}: wire definitions are generated...\n";
    addNetlistJtagcont($obj);
    print "INF: $obj->{class}: JTAG controller instance is generated...\n";
    addNetlistBsr($obj);
    print "INF: $obj->{class}: BSR instances are generated...\n";
    addNetlistIo($obj);
    print "INF: $obj->{class}: IO instances are generated...\n";
    addNetlistTap($obj);
    print "INF: $obj->{class}: TAP signals are connected...\n";
  
  # close model description
    push(@{$obj->{net}}, "\n");
    push(@{$obj->{net}}, "endmodule\n");
    push(@{$obj->{net}}, "\n");

    print "INF: $obj->{class}: Building BSR simulation model is finished.\n";
}

# ------------------------------------------------------------------------------
sub addNetlistTap {
    my ($obj) = @_;
    
    my @tap = (
        "",
        "	// =========================================================================",
        "	// IO<-->Tap connections",
        "	// =========================================================================",
    );
    
    for (my $i=0; $i<@{$obj->{port_def}}; $i++) {
        my $port = $obj->{port_def}->[$i];
        push(@tap, "	assign w_jtag_tck = w_io_co[$i]; // $port") if ($port eq $obj->{bsdl}->{tap}->{clock});
        push(@tap, "	assign w_jtag_tdi = w_io_co[$i]; // $port") if ($port eq $obj->{bsdl}->{tap}->{in});
        push(@tap, "	assign w_jtag_tms = w_io_co[$i]; // $port") if ($port eq $obj->{bsdl}->{tap}->{mode});
        if ($port eq $obj->{bsdl}->{tap}->{out}) {
            push(@tap, "	assign w_io_ci[$i] = w_jtag_tdo; // $port");
            push(@tap, "	assign w_io_oe_n[$i] = w_jtag_tdo_en_n; // $port OE");
        }
        if (exists($obj->{bsdl}->{tap}->{reset})) {
            push(@tap, "	assign w_jtag_trst = w_io_co[$i]; // $port") if ($port eq $obj->{bsdl}->{tap}->{reset});
        }
    }
    
    addCrCode(\@tap);
    push(@{$obj->{net}}, @tap);
}

# ------------------------------------------------------------------------------
sub addNetlistIo {
    my ($obj) = @_;
    
    my @io = (
        "",
        "	// =========================================================================",
        "	// IO instances",
        "	// =========================================================================",
    );
    
    for (my $i=0; $i<@{$obj->{port_def}}; $i++) {
        my $port = $obj->{port_def}->[$i];
        my $p_obj = $obj->{bsdl}->{port}->{$port};
        
        push(@io, "	IPat_Io_Inout ins_IO_$i (.pad($port), .ci(w_io_ci[$i]), .co(w_io_co[$i]), .oe_n(w_io_oe_n[$i]));") if ($p_obj->{dir} =~ /^\s*inout/i);
        push(@io, "	IPat_Io_Input ins_IO_$i (.pad($port), .co(w_io_co[$i]));") if ($p_obj->{dir} =~ /^\s*input/i);
        if ($p_obj->{dir} =~ /^\s*out/i) {
            if ($port eq $obj->{bsdl}->{tap}->{out}) {
                push(@io, "	IPat_Io_Output3 ins_IO_$i (.pad($port), .ci(w_io_ci[$i]), .oe_n(w_io_oe_n[$i]));");
            } else {
                push(@io, "	IPat_Io_Output2 ins_IO_$i (.pad($port), .ci(w_io_ci[$i]));");
            }
        }
    }
    
    addCrCode(\@io);
    push(@{$obj->{net}}, @io);
}

# ------------------------------------------------------------------------------
sub addNetlistBsr {
    my ($obj) = @_;
    
    my @bsr = (
        "",
        "	// =========================================================================",
        "	// Boundary Scan Registers",
        "	// =========================================================================",
    );
    
    my $flag_pull = 0;
    
  # fix pin name and assign pullup/down
    for (my $i=0; $i<@{$obj->{bsdl}->{bsr}}; $i++) {
        my $bsr_obj = $obj->{bsdl}->{bsr}->[$i];
      # pin name defined for output enable bsr
        if (exists($bsr_obj->{o_cont})) {
            my $mod_obj = $obj->{bsdl}->{bsr}->[$bsr_obj->{o_cont}];
            $mod_obj->{pin} = $bsr_obj->{pin};
            print "INF: $obj->{class}: bsdl: bsr: [$bsr_obj->{o_cont}]: re-defined pin for enable=$mod_obj->{pin}\n";
        }
        
      # extract pullup/down and add descriptions
        if (exists($bsr_obj->{o_stat})) {
            if ($bsr_obj->{o_stat} =~ /PULL1/i) {
                push(@bsr, "	// Pullup/Down statements for IO pad") unless ($flag_pull);
                push(@bsr, "	pullup($bsr_obj->{pin});");
                print "INF: $obj->{class}: bsdl: bsr: [$i]: find pull-up for $bsr_obj->{pin}\n";
                $flag_pull = 1;
            } elsif ($bsr_obj->{o_stat} =~ /PULL0/i) {
                push(@bsr, "	// Pullup/Down statements for IO pad") unless ($flag_pull);
                push(@bsr, "	pulldown($bsr_obj->{pin});");
                print "INF: $obj->{class}: bsdl: bsr: [$i]: find pull-down for $bsr_obj->{pin}\n";
                $flag_pull = 1;
            }
        }
    }
    
    push(@bsr, "") if ($flag_pull);
    
  # put BSR instances
    putBsrInstances(\@bsr, $obj);
  
    addCrCode(\@bsr);
    push(@{$obj->{net}}, @bsr);
}

# ------------------------------------------------------------------------------
sub putBsrInstances {
    my ($bsr, $obj) = @_;
    
    my $msb_bsr = $#{$obj->{bsdl}->{bsr}};
    push(@{$bsr}, "	// BSR shift chain");
    push(@{$bsr}, "	// w_bsr_si[$msb_bsr] and w_bsr_so[0] are already connected with JTAG controller");
    my $msb_si = $msb_bsr-1;
    push(@{$bsr}, "	assign w_bsr_si[$msb_si:0] = w_bsr_so[$msb_bsr:1];");
    push(@{$bsr}, "");
    push(@{$bsr}, "	// BSR instances");
    
    
    for (my $i=0; $i<@{$obj->{bsdl}->{bsr}}; $i++) {
        my $bsr_obj = $obj->{bsdl}->{bsr}->[$i];
        my $buf = '	';
      # BC module
        $buf .= 'IPat_BsrBC_1' if ($bsr_obj->{type} eq 'BC_1');
        $buf .= 'IPat_BsrBC_2' if ($bsr_obj->{type} eq 'BC_2');
        $buf .= 'IPat_BsrBC_4' if ($bsr_obj->{type} eq 'BC_4');
        
        $buf .= '_HighZ' if (($bsr_obj->{func} =~ /control/i) and (exists($obj->{bsdl}->{opcode}->{inst}->{HIGHZ})));
      # instance name
        $buf .= " ins_bsr_$i";
      # pin connection
        $buf .= " (.si(w_bsr_si[$i])";
        $buf .= ", .so(w_bsr_so[$i])";
        $buf .= ", .capture(w_bsr_capture)";
        $buf .= ", .shift(w_bsr_shift)";
        $buf .= ", .update(w_bsr_update)" unless ($bsr_obj->{type} eq 'BC_4');
        $buf .= ", .tck(w_jtag_tck)";
        
        my $io_id = findIoId($bsr_obj->{pin}, $obj);
        
        if ($bsr_obj->{func} =~ /input/i) {
            $buf .= ", .mode(w_bsr_mode_i)" unless ($bsr_obj->{type} eq 'BC_4');
            $buf .= ", .fi(w_io_co[$io_id])";
        }
        if ($bsr_obj->{func} =~ /output/i) {
            $buf .= ", .mode(w_bsr_mode_o)";
            $buf .= ", .fo(w_io_ci[$io_id])";
        }
        if ($bsr_obj->{func} =~ /control/i) {
            $buf .= ", .mode(w_bsr_mode_e)";
            $buf .= ", .fo(w_io_oe_n[$io_id])";
            $buf .= ", .highz(w_bsr_highz)" if (exists($obj->{bsdl}->{opcode}->{inst}->{HIGHZ}));
        }
      
      # comment
        $buf .= ");";
        $buf .= " // $obj->{port_def}->[$io_id]" if (defined($io_id));
        
        push(@{$bsr}, $buf);
    }
}

# ------------------------------------------------------------------------------
sub findIoId {
    my ($pin, $obj) = @_;
    
    my $idx = undef;
    
    for (my $i=0; $i<@{$obj->{port_def}}; $i++) {
        if ($pin eq $obj->{port_def}->[$i]) {
            $idx = $i;
            last;
        }
    }
    
    return($idx);
}

# ------------------------------------------------------------------------------
sub addNetlistJtagcont {
    my ($obj) = @_;
    
    my @jtagcont = (
        "",
        "	// =========================================================================",
        "	// JTAG controller",
        "	// =========================================================================",
        "	IPat_JtagCont #("
    );
    
  # parameters
    push(@jtagcont, "		.P_WD_IR($obj->{bsdl}->{opcode}->{length}),");
    push(@jtagcont, "		.P_IR_IDCODE($obj->{bsdl}->{opcode}->{inst}->{IDCODE}->[0]),");
    push(@jtagcont, "		.P_IR_SAMPLE($obj->{bsdl}->{opcode}->{inst}->{SAMPLE}->[0]),");
    push(@jtagcont, "		.P_IR_EXTEST($obj->{bsdl}->{opcode}->{inst}->{EXTEST}->[0]),");
    push(@jtagcont, "		.P_IR_BYPASS($obj->{bsdl}->{opcode}->{inst}->{BYPASS}->[0]),");
    
    if (exists($obj->{bsdl}->{opcode}->{inst}->{HIGHZ})) {
        push(@jtagcont, "		.P_EN_HIGHZ(1'b1),");
        push(@jtagcont, "		.P_IR_HIGHZ($obj->{bsdl}->{opcode}->{inst}->{HIGHZ}->[0]),");
    } else {
        push(@jtagcont, "		.P_EN_HIGHZ(1'b0),");
    }

    if (exists($obj->{bsdl}->{opcode}->{inst}->{CLAMP})) {
        push(@jtagcont, "		.P_EN_CLAMP(1'b1),");
        push(@jtagcont, "		.P_IR_CLAMP($obj->{bsdl}->{opcode}->{inst}->{CLAMP}->[0]),");
    } else {
        push(@jtagcont, "		.P_EN_CLAMP(1'b0),");
    }
    
    push(@jtagcont, "		.P_DEVICE_ID($obj->{bsdl}->{devid})");
    push(@jtagcont, "	)");
    push(@jtagcont, "	ins_IPat_JtagCont (");
    push(@jtagcont, "		.TCK(w_jtag_tck),");
    push(@jtagcont, "		.TDI(w_jtag_tdi),");
    push(@jtagcont, "		.TMS(w_jtag_tms),");
    push(@jtagcont, "		.TDO(w_jtag_tdo),");
    push(@jtagcont, "		.tdo_en_n(w_jtag_tdo_en_n),	// TDO output enable(negative)");
    push(@jtagcont, "		.TRST(w_jtag_trst),");
    push(@jtagcont, "		");
    push(@jtagcont, "		.bsr_si(w_bsr_si[$#{$obj->{bsdl}->{bsr}}]),");
    push(@jtagcont, "		.bsr_so(w_bsr_so[0]),");
    push(@jtagcont, "		.bsr_capture(w_bsr_capture),");
    push(@jtagcont, "		.bsr_shift(w_bsr_shift),");
    push(@jtagcont, "		.bsr_update(w_bsr_update),");
    push(@jtagcont, "		.bsr_mode_i(w_bsr_mode_i),");
    push(@jtagcont, "		.bsr_mode_o(w_bsr_mode_o),");
    push(@jtagcont, "		.bsr_mode_e(w_bsr_mode_e),");
    push(@jtagcont, "		.bsr_highz(w_bsr_highz)");
    push(@jtagcont, "	);\n");
    
  # If TRST is not defined, the port is fixed to 1'b1
    if (exists($obj->{bsdl}->{tap}->{reset})) {
        push(@jtagcont, "	// pulldown($obj->{bsdl}->{tap}->{reset}); // should be controlled explicitly"); # TMS
    } else {
        push(@jtagcont, "	assign w_jtag_trst = 1'b1;	// TRST port is not defined on $obj->{bsdl}->{entity}.");
    }
    
  # TAP pull-up/down
    push(@jtagcont, "");
    push(@jtagcont, "	// pullup($obj->{bsdl}->{tap}->{mode}); // should be controlled explicitly"); # TMS
    push(@jtagcont, "	// pulldown($obj->{bsdl}->{tap}->{in}); // should be controlled explicitly"); # TDI
    push(@jtagcont, "	// pulldown($obj->{bsdl}->{tap}->{clock}); // should be controlled explicitly"); # TCK
    
    addCrCode(\@jtagcont);
    push(@{$obj->{net}}, @jtagcont);
}

# ------------------------------------------------------------------------------
sub addNetlistWiredef {
    my ($obj) = @_;
    
    my $msb_io = $#{$obj->{port_def}};
    my $msb_bsr = $#{$obj->{bsdl}->{bsr}};
    
    my @wire_def = (
        "",
        "	// =========================================================================",
        "	// wire definitions",
        "	// =========================================================================",
        "	wire	[$msb_io:0]	w_io_ci;	// BSR fo-->IO internal ci",
        "	wire	[$msb_io:0]	w_io_co;	// BSR fi<--IO internal co",
        "	wire	[$msb_io:0]	w_io_oe_n;	// BSR fo-->IO internal oe_n",
        "",
        "	wire	w_bsr_capture;	// JTAGcont-->BSR capture",
        "	wire	w_bsr_shift;	// JTAGcont-->BSR shift",
        "	wire	w_bsr_update;	// JTAGcont-->BSR update",
        "	wire	w_bsr_mode_i;	// JTAGcont-->BSR mode_i",
        "	wire	w_bsr_mode_o;	// JTAGcont-->BSR mode_o",
        "	wire	w_bsr_mode_e;	// JTAGcont-->BSR mode_e",
        "	wire	w_bsr_highz;	// JTAGcont-->BSR highz",
        "",
        "	wire	[$msb_bsr:0]	w_bsr_si;	// -->BSR si",
        "	wire	[$msb_bsr:0]	w_bsr_so;	// BSR so-->",
        "",
        "	wire	w_jtag_tdi;	// TDI IO-->JTAGcont TDI",
        "	wire	w_jtag_tck;	// TCK IO-->JTAGcont TCK",
        "	wire	w_jtag_tms;	// TMS IO-->JTAGcont TMS",
        "	wire	w_jtag_tdo;	// TDO IO<--JTAGcont TDO",
        "	wire	w_jtag_tdo_en_n;	// TDO IO<--JTAGcont tdo_en_n",
        "	wire	w_jtag_trst;	// TRST IO-->JTAGcont TRST"
    );

    addCrCode(\@wire_def);
    push(@{$obj->{net}}, @wire_def);
}

# ------------------------------------------------------------------------------
sub addNetlistPortdef {
    my ($obj) = @_;
    
    my @port_def;
    my $idx = 0;
    
    foreach my $port (sort(keys(%{$obj->{bsdl}->{port}}))) {
        push(@{$obj->{port_def}},$port);
        my $p_obj = $obj->{bsdl}->{port}->{$port};
        my $buf = "\t";
      
      # direction
        my $dir = $p_obj->{dir};
        unless (
          ($dir eq 'input') or
          ($dir eq 'output') or ($dir eq 'out') or ($dir eq 'buffer') or
          ($dir eq 'inout')) {
            die "ERR: $obj->{class}: direction $dir for $port is not supported.\n";
        }
        $dir = 'output' if $dir =~ (/^\s*out/i);
        $dir = 'output' if $dir =~ (/^\s*buffer/i);
        
        #$dir = 'inout' if ($port eq $obj->{bsdl}->{tap}->{mode});  # TMS needs pull-up so dir is set inout.
        #$dir = 'inout' if ($port eq $obj->{bsdl}->{tap}->{clock}); # TCK needs pull-down so dir is set inout.
        
        $buf .= "$dir\t";
      
      # width
        if ($p_obj->{width} =~ /vector/) {
            $buf .= "[$p_obj->{msb}:$p_obj->{lsb}]\t"; # bit_vector
            die "ERR: $obj->{class}: currently the script does not support vector ports for $port.\n";
        } else {
            $buf .= "\t"; # bit
        }
      
      # name
        $buf .= $port;
        $buf .= ",\t// IO index [$idx]\n";
        
        push(@port_def, $buf);
        $idx++;
    }
    
    $port_def[$#port_def] =~ s/,//; # remove , from last port definition
    push(@port_def, ");\n");
    
    push(@{$obj->{net}}, @port_def);
}

# ------------------------------------------------------------------------------
sub addNetlistHeader {
    my ($obj) = @_;
    
    my ($sec, $min, $hour, $mday, $mon, $year, $wday, $yday, $isdst) = localtime;
    $year += 1900; # start from 1900
    $mon++;        # start from 0
    
    my $date_time = "$year/$mon/$mday,$hour:$min:$sec";
    
    my @header = (
        "// =============================================================================",
        "// BSR Simulation model for $obj->{bsdl}->{entity}",
        "// From $obj->{bsdl}->{bsdl}", 
        "// Date: $date_time",
        "// =============================================================================",
        "",
        "`timescale $obj->{sim}->{timescale}",
        "",
        "module $obj->{bsdl}->{entity} ("
    );
    
    addCrCode(\@header);
    push(@{$obj->{net}}, @header);
}

# ------------------------------------------------------------------------------
sub addCrCode {
    my ($list) = @_;
    
    for (my $i=0; $i<@{$list}; $i++) {
        $list->[$i] .= "\n";
    }
}

# ==============================================================================
# When you need to change specification for simulation
# ==============================================================================
sub setSimSpec {
    my ($obj) = @_;
    
    $obj->{sim}->{timescale} = '1ns/1ns';
}

## ==============================================================================
## When you need to change specification of JTAG controller, modify following:
## ==============================================================================
#sub setJtagContSpec {
#    my ($obj) = @_;
#    
#    $obj->{jtag}->{module} = 'IPat_JtagCont'; # module name of the JTAG controller
#    
#    $obj->{jtag}->{tap}->{tck}  = 'TCK';  # scan clock  port of the JTAG controller
#    $obj->{jtag}->{tap}->{tms}  = 'TMS';  # scan mode   port of the JTAG controller
#    $obj->{jtag}->{tap}->{tdi}  = 'TDI';  # scan input  port of the JTAG controller
#    $obj->{jtag}->{tap}->{trst} = 'TRST'; # scan reset  port of the JTAG controller
#    $obj->{jtag}->{tap}->{tdo}  = 'TDO';  # scan output port of the JTAG controller
#    
#    $obj->{jtag}->{tap}->{tdo_en} = 'tdo_en_n'; # output enable(negative) port for TDO macro
#    
#    $obj->{jtag}->{bsr}->{si}      = 'bsr_si';      # output port connected to first BSR si.
#    $obj->{jtag}->{bsr}->{so}      = 'bsr_so';      # input  port connected to last  BSR so.
#    $obj->{jtag}->{bsr}->{capture} = 'bsr_capture'; # output port connected to all BSR capture
#    $obj->{jtag}->{bsr}->{shift}   = 'bsr_shift';   # output port connected to all BSR shift
#    $obj->{jtag}->{bsr}->{update}  = 'bsr_update';  # output port connected to all BSR update
#    $obj->{jtag}->{bsr}->{mode_i}  = 'bsr_mode_i';  # output port connected to all mode of input BSR
#    $obj->{jtag}->{bsr}->{mode_o}  = 'bsr_mode_i';  # output port connected to all mode of output BSR
#    $obj->{jtag}->{bsr}->{mode_e}  = 'bsr_mode_i';  # output port connected to all mode of output enable BSR
#    
#    $obj->{jtag}->{param}->{wd}     = 'P_WD_IR';     # parameter name of IR width
#    $obj->{jtag}->{param}->{idcode} = 'P_IR_IDCODE'; # parameter name of IR IDCODE
#    $obj->{jtag}->{param}->{sample} = 'P_IR_SAMPLE'; # parameter name of IR SAMPLE/PRELOAD
#    $obj->{jtag}->{param}->{extest} = 'P_IR_EXTEST'; # parameter name of IR EXTEST
#    $obj->{jtag}->{param}->{bypass} = 'P_IR_BYPASS'; # parameter name of IR BYPASS
#    $obj->{jtag}->{param}->{highz}  = 'P_IR_HIGHZ';  # parameter name of IR EXTEST
#    $obj->{jtag}->{param}->{clamp}  = 'P_IR_CLAMP';  # parameter name of IR EXTEST
#    
#    $obj->{jtag}->{param}->{en_highz} = 'P_EN_HIGHZ'; # parameter enable HIGHZ control
#    $obj->{jtag}->{param}->{en_clamp} = 'P_EN_CLAMP'; # parameter enable CLMP control
#}

## ==============================================================================
## When you need to change specification of Boundary Scan Register, modify following:
## ==============================================================================
#sub setJtagBcSpec {
#    my ($obj) = @_;
#    
#    $obj->{jtag}->{bc}->{bc_1}->{module} = 'IPat_BsrBC_1'; # BC_1 module name
#    $obj->{jtag}->{bc}->{bc_1}->{fi} = 'fi'; # normal function input
#    $obj->{jtag}->{bc}->{bc_1}->{fo} = 'fo'; # normal function output
#    $obj->{jtag}->{bc}->{bc_1}->{si} = 'si'; # BSR chain input
#    $obj->{jtag}->{bc}->{bc_1}->{so} = 'so'; # BSR chain output
#    $obj->{jtag}->{bc}->{bc_1}->{capture} = 'capture'; # BSR capture control input
#    $obj->{jtag}->{bc}->{bc_1}->{shift}   = 'shift';   # BSR shift   control input
#    $obj->{jtag}->{bc}->{bc_1}->{update}  = 'update';  # BSR update  control input
#    $obj->{jtag}->{bc}->{bc_1}->{mode}    = 'mode';    # BSR mode    control input
#    $obj->{jtag}->{bc}->{bc_1}->{tck}     = 'tck';     # BSR clock input
#    
#    $obj->{jtag}->{bc}->{bc_2}->{module} = 'IPat_BsrBC_2'; # BC_2 module name
#    $obj->{jtag}->{bc}->{bc_2}->{fi} = 'fi'; # normal function input
#    $obj->{jtag}->{bc}->{bc_2}->{fo} = 'fo'; # normal function output
#    $obj->{jtag}->{bc}->{bc_2}->{si} = 'si'; # BSR chain input
#    $obj->{jtag}->{bc}->{bc_2}->{so} = 'so'; # BSR chain output
#    $obj->{jtag}->{bc}->{bc_2}->{capture} = 'capture'; # BSR capture control input
#    $obj->{jtag}->{bc}->{bc_2}->{shift}   = 'shift';   # BSR shift   control input
#    $obj->{jtag}->{bc}->{bc_2}->{update}  = 'update';  # BSR update  control input
#    $obj->{jtag}->{bc}->{bc_2}->{mode}    = 'mode';    # BSR mode    control input
#    $obj->{jtag}->{bc}->{bc_2}->{tck}     = 'tck';     # BSR clock input
#    
#    $obj->{jtag}->{bc}->{bc_1_highz}->{module} = 'IPat_BsrBC_1_HighZ'; # BC_1 module name with HIGHZ control
#    $obj->{jtag}->{bc}->{bc_1_highz}->{fi} = 'fi'; # normal function input
#    $obj->{jtag}->{bc}->{bc_1_highz}->{fo} = 'fo'; # normal function output
#    $obj->{jtag}->{bc}->{bc_1_highz}->{si} = 'si'; # BSR chain input
#    $obj->{jtag}->{bc}->{bc_1_highz}->{so} = 'so'; # BSR chain output
#    $obj->{jtag}->{bc}->{bc_1_highz}->{capture} = 'capture'; # BSR capture control input
#    $obj->{jtag}->{bc}->{bc_1_highz}->{shift}   = 'shift';   # BSR shift   control input
#    $obj->{jtag}->{bc}->{bc_1_highz}->{update}  = 'update';  # BSR update  control input
#    $obj->{jtag}->{bc}->{bc_1_highz}->{mode}    = 'mode';    # BSR mode    control input
#    $obj->{jtag}->{bc}->{bc_1_highz}->{highz}   = 'highz';   # BSR highz   control input
#    $obj->{jtag}->{bc}->{bc_1_highz}->{tck}     = 'tck';     # BSR clock input
#    
#    $obj->{jtag}->{bc}->{bc_2_highz}->{module} = 'IPat_BsrBC_2_HighZ'; # BC_2 module name with HIGHZ control
#    $obj->{jtag}->{bc}->{bc_2_highz}->{fi} = 'fi'; # normal function input
#    $obj->{jtag}->{bc}->{bc_2_highz}->{fo} = 'fo'; # normal function output
#    $obj->{jtag}->{bc}->{bc_2_highz}->{si} = 'si'; # BSR chain input
#    $obj->{jtag}->{bc}->{bc_2_highz}->{so} = 'so'; # BSR chain output
#    $obj->{jtag}->{bc}->{bc_2_highz}->{capture} = 'capture'; # BSR capture control input
#    $obj->{jtag}->{bc}->{bc_2_highz}->{shift}   = 'shift';   # BSR shift   control input
#    $obj->{jtag}->{bc}->{bc_2_highz}->{update}  = 'update';  # BSR update  control input
#    $obj->{jtag}->{bc}->{bc_2_highz}->{mode}    = 'mode';    # BSR mode    control input
#    $obj->{jtag}->{bc}->{bc_2_highz}->{highz}   = 'highz';   # BSR highz   control input
#    $obj->{jtag}->{bc}->{bc_2_highz}->{tck}     = 'tck';     # BSR clock input
#    
#    $obj->{jtag}->{bc}->{bc_4}->{module} = 'IPat_BsrBC_4'; # BC_4 module name
#    $obj->{jtag}->{bc}->{bc_4}->{fi} = 'fi'; # normal function input
#    $obj->{jtag}->{bc}->{bc_4}->{si} = 'si'; # BSR chain input
#    $obj->{jtag}->{bc}->{bc_4}->{so} = 'so'; # BSR chain output
#    $obj->{jtag}->{bc}->{bc_4}->{capture} = 'capture'; # BSR capture control input
#    $obj->{jtag}->{bc}->{bc_4}->{shift}   = 'shift';   # BSR shift   control input
#    $obj->{jtag}->{bc}->{bc_4}->{tck}     = 'tck';     # BSR clock input
#}

## ==============================================================================
## When you need to change specification of IO module, modify following:
## ==============================================================================
#sub setIoSpec {
#    my ($obj) = @_;
#    
#    $obj->{io}->{inout}->{module}      = 'IPat_Io_Inout';
#    $obj->{io}->{inout}->{module_pu}   = 'IPat_Io_InoutPu';
#    $obj->{io}->{inout}->{module_pd}   = 'IPat_Io_InoutPd';
#    $obj->{io}->{inout}->{pad}         = 'pad';
#    $obj->{io}->{inout}->{c_in}        = 'ci';  # core to pad
#    $obj->{io}->{inout}->{c_out}       = 'co';  # pad to core
#    $obj->{io}->{inout}->{oe_n}        = 'oe_n';
#
#    $obj->{io}->{input}->{module}      = 'IPat_Io_Input';
#    $obj->{io}->{input}->{module_pu}   = 'IPat_Io_InputPu';
#    $obj->{io}->{input}->{module_pd}   = 'IPat_Io_InputPd';
#    $obj->{io}->{input}->{pad}         = 'pad';
#    $obj->{io}->{input}->{c_in}        = 'ci';  # core to pad
#
#    $obj->{io}->{output3}->{module}    = 'IPat_Io_Output3';
#    $obj->{io}->{output3}->{module_pu} = 'IPat_Io_Output3Pu';
#    $obj->{io}->{output3}->{module_pd} = 'IPat_Io_Output3Pd';
#    $obj->{io}->{output3}->{pad}       = 'pad';
#    $obj->{io}->{output3}->{c_in}      = 'ci';  # core to pad
#    $obj->{io}->{output3}->{oe_n}      = 'oe_n';
#
#    $obj->{io}->{output2}->{module}    = 'IPat_Io_Output2';
#    $obj->{io}->{output2}->{pad}       = 'pad';
#    $obj->{io}->{output2}->{c_in}      = 'ci';  # core to pad
#}

1;